- Layout in advanced CMOS technologies including floorplan, placement, routing, DRC, LVS etc.
- Should have worked on 22nm, 28nm, 45nm, 65nm etc. technology nodes on various analog mixed signal blocks such as PLL, Band gap, ADC, DAC, SERDES, IO etc.
- Should be well versed with tools such as Virtuoso/XL/GXL, IC12.1, and Calibre etc.
- Exposure to automated place and route tools such as ICC, SOC Encounter etc. would be added advantage.
- Required to work with circuit designers to meet design specifications.
- Requires excellent teamwork, good communication and strong problem solving skills.
- Ability to collaborate with others across groups in a direct and productive manner with unquestionable integrity.
- Strong analytical ability, problem solving, and communication skills.
- Ability to work independently and at various levels of abstraction.
Education: B.E/B.Tech or M.E/M.Tech/M.S in Electrical or Electronics