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Physical Design Engineer / Senior Engineer

Location : Bangalore

Experience: 3-10 Years

Job Description:

  • Independent planning and execution of Netlist-to-GDSII.
  • Exposure to all aspects of design flows like floor planning, placement, CTS, routing, crosstalk, physical verification.
  • Should have good exposure to high frequency design convergence and exposure to physical design methodology.
  • Work independently in the areas of RTL to GDSII implementation.
    Ability to collaborate and resolve issues wrt constraints validation, verification, STA, Physical design, etc.
  • Knowledge of low power flow (power gating, multi-VT flow, power supply management etc.).
  • Circuit level comprehension of time critical paths in the design.
    Tcl/Perl scripting. Willing to handle technical deliveries with a team of engineers.
  • Well versed with the level timing closure (STA), timing closure methodologies, ECO generation and predictable convergence.
    Well versed with parasitic extraction, LVS/DRC and other Physical verification checks.
  • Should be able to provide clear directions to the team wrt PNR issues.
  • Understanding of deep sub-micron design problems and solutions (leakage power, signal integrity, DFM etc.)


Education: B.E/B.Tech or M.E/M.Tech/M.S in Electrical or Electronics




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